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  ? semiconductor components industries, llc, 2012 july, 2012 ? rev. 5 1 publication order number: mc74hc175a/d mc74hc175a quad d flip-flop with common clock and reset high ? performance silicon ? gate cmos the mc74hc175a is identical in pinout to the ls175. the device inputs are compatible with standard cmos outputs; with pullup resistors, they are compatible with lsttl outputs. this device consists of four d flip ? flops with common reset and clock inputs, and separate d inputs. reset (active ? low) is asynchronous and occurs when a low level is applied to the reset input. information at a d input is transferred to the corresponding q output on the next positive going edge of the clock input. features ? output drive capability: 10 lsttl loads ? outputs directly interface to cmos, nmos, and ttl ? operating voltage range: 2.0 to 6.0 v ? low input current: 1  a ? high noise immunity characteristic of cmos devices ? in compliance with the requirements defined by jedec standard no. 7 a ? chip complexity 166 fets or 41.5 equivalent gates ? nlv prefix for automotive and other applications requiring unique site and control change requirements; aec ? q100 qualified and ppap capable ? these devices are pb ? free, halogen free/bfr free and are rohs compliant http://onsemi.com see detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. ordering information marking diagrams soic ? 16 d suffix case 751b tssop ? 16 dt suffix case 948f 1 16 pdip ? 16 n suffix case 648 1 16 1 16 1 16 mc74hc175an awlyywwg 1 16 hc175ag awlyww hc 175a alyw   1 16 a = assembly location l, wl = wafer lot y, yy = year w, ww = work week g or  = pb ? free package (note: microdot may be in either location)
mc74hc175a http://onsemi.com 2 pin 16 = v cc pin 8 = gnd 9 4 5 12 13 clock d0 d1 d2 d3 reset 1 data inputs 2 3 7 6 10 11 15 14 q0 q0 q1 q1 q2 q2 q3 q3 inverting and noninverting outputs function table inputs outputs reset clock d q q lxxlh hhhl hllh h l x no change 13 14 15 16 9 10 11 12 5 4 3 2 1 8 7 6 d2 d3 q3 q3 v cc clock q2 q2 d0 q0 q0 reset gnd q1 q1 d1 figure 1. pin assignment figure 2. logic diagram ordering information device package shipping ? mc74hc175ang pdip ? 16 500 units / rail mc74hc175adg soic ? 16 (pb ? free) 48 units / rail mc74hc175adr2g soic ? 16 (pb ? free) 2500 / tape & reel mc74hc175adtr2g tssop ? 16 (pb ? free) 2500 / tape & reel NLV74HC175ADTR2G* tssop ? 16 (pb ? free) 2500 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d. *nlv prefix for automotive and other applications requiring unique site and control change requirements; aec ? q100 qualified and ppap capable
mc74hc175a http://onsemi.com 3 ??????????????????????? ??????????????????????? ???? ???? ?????????????? ?????????????? ????? ????? ??? ??? ???? ???? v cc ?????????????? ?????????????? ????? ????? ??? ??? ???? ???? ?????????????? ?????????????? ????? ????? ??? ??? ???? ???? ?????????????? ?????????????? ????? ????? ??? ??? ???? ???? ?????????????? ?????????????? ????? ????? 20 ??? ??? ???? ???? ?????????????? ?????????????? ????? ????? 25 ??? ??? ???? ???? ?????????????? ?????????????? ????? ????? 50 ??? ??? ???? ???? ???? ?????????????? ?????????????? ?????????????? ????? ????? ????? ??? ??? ??? ???? ???? ?????????????? ?????????????? ????? ????? ??? ???  c ???? ???? ???? ?????????????? ?????????????? ?????????????? ????? ????? ????? ??? ??? ???  c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recom mended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. ?derating ? plastic dip: ? 10 mw/  c from 65  to 125  c soic package: ? 7 mw/  c from 65  to 125  c tssop package: ? 6.1 mw/  c from 65  to 125  c recommended operating conditions ???? ???? ?????????????? ?????????????? ??? ??? ??? ??? ??? ??? ???? ???? v cc ?????????????? ?????????????? ??? ??? ??? ??? ??? ??? ???? ???? ?????????????? ?????????????? ??? ??? ??? ??? ??? ??? ???? ???? ?????????????? ?????????????? ??? ??? ??? ??? ??? ???  c ???? ???? ???? ???? ?????????????? ?????????????? ?????????????? ?????????????? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? dc electrical characteristics (voltages referenced to gnd) ???? ???? ???? ???? symbol ????????? ????????? ????????? ????????? ????????? ????????? ????????? ????????? ???? ???? ???? ???? ????????? ????????? ??? ??? ??? ??? ???? ???? ????  c ??? ??? ???  85  c ???? ???? ????  125  c ???? ???? ???? ???? v ih ????????? ????????? ????????? ????????? ? level input voltage ????????? ????????? ????????? ?????????  20  a ???? ???? ???? ???? ???? ???? ???? ???? ??? ??? ??? ??? ???? ???? ???? ???? ??? ??? ??? ??? ???? ???? ???? ???? ????????? ????????? ????????? ????????? ? level input voltage ????????? ????????? ????????? ?????????  20  a ???? ???? ???? ???? ???? ???? ???? ???? ??? ??? ??? ??? ???? ???? ???? ???? ??? ??? ??? ??? ???? ???? ???? ???? ???? ????????? ????????? ????????? ????????? ????????? ? level output voltage ????????? ????????? ?????????  20  a ???? ???? ???? ???? ???? ???? ??? ??? ??? ???? ???? ???? ??? ??? ??? ??? ??? ????????? ????????? ?????????  2.4 ma |i out |  4.0 ma |i out |  5.2 ma ???? ???? ???? ???? ???? ???? ??? ??? ??? ???? ???? ???? ? impedance cir- cuit. for proper operation, v in and v out should be constrained to the range gnd  (v in or v out )  v cc . unused inputs must always be tied to an appropriate logic voltage level (e.g., either gnd or v cc ). unused outputs must be left open.
mc74hc175a http://onsemi.com 4 dc electrical characteristics (voltages referenced to gnd) ??? ??? unit ????????? ????????? ???? ???? ????????? ????????? ????????? ????????? ???? ???? ??? ??? ??? ???? ???? ????  125  c ??? ??? ???  85  c ???? ???? ????  c ???? ???? ???? ????????? ????????? ????????? ????????? ????????? ????????? ???? ???? ???? ???? ???? ???? ???? ???? ???? v ol ????????? ????????? ????????? ????????? ????????? ????????? ? level output voltage ????????? ????????? ????????? ?????????  20  a ???? ???? ???? ???? ???? ???? ???? ???? ??? ??? ??? ??? ???? ???? ???? ???? ??? ??? ??? ??? ??? ??? ????????? ????????? ?????????  2.4 ma |i out |  4.0 ma |i out |  5.2 ma ???? ???? ???? ???? ???? ???? ??? ??? ??? ???? ???? ???? ???? ???? ????????? ????????? ????????? ????????? ???? ???? ???? ???? 0.1 ??? ??? 1.0 ???? ???? 1.0 ??? ???  a ???? ???? ???? ????????? ????????? ????????? ????????? ????????? ?????????  a ???? ???? ???? ???? ???? ???? ??? ??? ??? ???? ???? ???? ??? ??? ???  a ac electrical characteristics (c l = 50 pf, input t r = t f = 6 ns) ???? ???? ???? ???? symbol ????????????????? ????????????????? ????????????????? ????????????????? ???? ???? ???? ???? ????????? ????????? ??? ??? ??? ??? ???? ???? ????  c ??? ??? ???  85  c ???? ???? ????  125  c ???? ???? ???? ???? f max ????????????????? ????????????????? ????????????????? ????????????????? ???? ???? ???? ???? ???? ???? ???? ???? ??? ??? ??? ??? ???? ???? ???? ???? ??? ??? ??? ??? ???? ???? ???? ???? ????????????????? ????????????????? ????????????????? ????????????????? ???? ???? ???? ???? ???? ???? ???? ???? ??? ??? ??? ??? ???? ???? ???? ???? ??? ??? ??? ??? ???? ???? ???? ???? ????????????????? ????????????????? ????????????????? ????????????????? ???? ???? ???? ???? ???? ???? ???? ???? ??? ??? ??? ??? ???? ???? ???? ???? ??? ??? ??? ??? ???? ???? ???? ???? ????????????????? ????????????????? ????????????????? ????????????????? ???? ???? ???? ???? ???? ???? ???? ???? ??? ??? ??? ??? ???? ???? ???? ???? ??? ??? ??? ??? ???? ???? ????????????????? ????????????????? ???? ???? ???? ???? ??? ??? ???? ???? ??? ??? ? flop)* typical @ 25 c, v cc = 5.0 v pf 35 * used to determine the no ? load dynamic power consumption: p d = c pd v cc 2 f + i cc v cc .
mc74hc175a http://onsemi.com 5 timing requirements (input t r = t f = 6 ns) ???? ???? ???? ???? symbol ????????????????? ????????????????? ????????????????? ????????????????? ???? ???? ???? ???? ????????? ????????? ??? ??? ??? ??? ???? ???? ????  c ??? ??? ???  85  c ???? ???? ????  125  c ???? ???? ???? t su ????????????????? ????????????????? ????????????????? ???? ???? ???? ???? ???? ???? ??? ??? ??? ???? ???? ???? ??? ??? ??? ???? ???? ???? ???? ????????????????? ????????????????? ????????????????? ????????????????? ???? ???? ???? ???? ???? ???? ???? ???? ??? ??? ??? ??? ???? ???? ???? ???? ??? ??? ??? ??? ???? ???? ???? ???? ????????????????? ????????????????? ????????????????? ????????????????? ???? ???? ???? ???? ???? ???? ???? ???? ??? ??? ??? ??? ???? ???? ???? ???? ??? ??? ??? ??? ???? ???? ???? ???? ????????????????? ????????????????? ????????????????? ????????????????? ???? ???? ???? ???? ???? ???? ???? ???? ??? ??? ??? ??? ???? ???? ???? ???? ??? ??? ??? ??? ???? ???? ???? ???? ????????????????? ????????????????? ????????????????? ????????????????? ???? ???? ???? ???? ???? ???? ???? ???? ??? ??? ??? ??? ???? ???? ???? ???? ??? ??? ??? ??? ???? ???? ???? ???? ????????????????? ????????????????? ????????????????? ????????????????? ???? ???? ???? ???? ???? ???? ???? ???? ??? ??? ??? ??? ???? ???? ???? ???? ??? ??? ??? ???
mc74hc175a http://onsemi.com 6 switching waveforms figure 3. 50% 50% 50% 50% v cc v cc gnd gnd reset q q clock t plh t phl 50% data clock v cc v cc gnd figure 4. gnd *includes all probe and jig capacitance c l * test point device under test output figure 5. 1/f max clock q or q t f t r v cc gnd 90% 50% 10% 90% 50% 10% t plh t phl t tlh t thl t w t w t rec valid t h t su test circuit figure 6.
mc74hc175a http://onsemi.com 7 dq c c r d0 clock d1 d2 d3 reset 1 13 12 5 9 4 2 3 7 6 10 11 15 14 q0 q0 q1 q1 q2 q2 q3 q3 expanded logic diagram dq c c r dq c c r dq c c r
mc74hc175a http://onsemi.com 8 package dimensions pdip ? 16 case 648 ? 08 issue t notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of leads when formed parallel. 4. dimension b does not include mold flash. 5. rounded corners optional. ? a ? b f c s h g d j l m 16 pl seating 18 9 16 k plane ? t ? m a m 0.25 (0.010) t dim min max min max millimeters inches a 0.740 0.770 18.80 19.55 b 0.250 0.270 6.35 6.85 c 0.145 0.175 3.69 4.44 d 0.015 0.021 0.39 0.53 f 0.040 0.70 1.02 1.77 g 0.100 bsc 2.54 bsc h 0.050 bsc 1.27 bsc j 0.008 0.015 0.21 0.38 k 0.110 0.130 2.80 3.30 l 0.295 0.305 7.50 7.74 m 0 10 0 10 s 0.020 0.040 0.51 1.01    
mc74hc175a http://onsemi.com 9 package dimensions soic ? 16 case 751b ? 05 issue k notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 18 16 9 seating plane f j m r x 45  g 8 pl p ? b ? ? a ? m 0.25 (0.010) b s ? t ? d k c 16 pl s b m 0.25 (0.010) a s t dim min max min max inches millimeters a 9.80 10.00 0.386 0.393 b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.054 0.068 d 0.35 0.49 0.014 0.019 f 0.40 1.25 0.016 0.049 g 1.27 bsc 0.050 bsc j 0.19 0.25 0.008 0.009 k 0.10 0.25 0.004 0.009 m 0 7 0 7 p 5.80 6.20 0.229 0.244 r 0.25 0.50 0.010 0.019  6.40 16x 0.58 16x 1.12 1.27 dimensions: millimeters 1 pitch soldering footprint* 16 89 8x *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d.
mc74hc175a http://onsemi.com 10 package dimensions tssop ? 16 case 948f ? 01 issue b ??? ??? dim min max min max inches millimeters a 4.90 5.10 0.193 0.200 b 4.30 4.50 0.169 0.177 c ??? 1.20 ??? 0.047 d 0.05 0.15 0.002 0.006 f 0.50 0.75 0.020 0.030 g 0.65 bsc 0.026 bsc h 0.18 0.28 0.007 0.011 j 0.09 0.20 0.004 0.008 j1 0.09 0.16 0.004 0.006 k 0.19 0.30 0.007 0.012 k1 0.19 0.25 0.007 0.010 l 6.40 bsc 0.252 bsc m 0 8 0 8 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash. protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. dimension k does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the k dimension at maximum material condition. 6. terminal numbers are shown for reference only. 7. dimension a and b are to be determined at datum plane ? w ? .  section n ? n seating plane ident. pin 1 1 8 16 9 detail e j j1 b c d a k k1 h g ? u ? s u 0.15 (0.006) t s u 0.15 (0.006) t s u m 0.10 (0.004) v s t 0.10 (0.004) ? t ? ? v ? ? w ? 0.25 (0.010) 16x ref k n n 7.06 16x 0.36 16x 1.26 0.65 dimensions: millimeters 1 pitch soldering footprint* *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d.
mc74hc175a http://onsemi.com 11 on semiconductor and are registered trademarks of semiconductor co mponents industries, llc (scillc). scillc owns the rights to a numb er of patents, trademarks, copyrights, trade secrets, and other intellectual property. a list ing of scillc?s product/patent coverage may be accessed at ww w.onsemi.com/site/pdf/patent ? marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/ or specifications can and do vary in different applications and actual performance may vary over time. all operating parame ters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or a uthorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in whic h the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or us e scillc products for any such unintended or unauthorized appli cation, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unin tended or unauthorized use, even if such claim alleges that scil lc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyrig ht laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 mc74hc175a/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative


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